1. Field of the invention
The field of the invention generally relates to computing equipment, and more specifically to the architecture of integrated circuit chips and the associated architecture of computers for improving the performance capability of computers.
2. Description of the Prior Art.
1. The key bottleneck in expanding the ability of computers to process information at a faster rate is the sequential nature of the standard Von Neumann architecture currently in use. Although the process of structuring a mathematical problem in a sequential manner appears to be a normal mechanism of human thought processes, once the process to be used is known, it is necessary for the computing device to do as many parallel functions as possible. The need for this is so that the computer can reduce the time to complete the computation to a fraction of the time required by a human. In this manner the computer is serving as an adjunct to the human and is greatly amplifying the human capability.
Various techniques have been explored to speed up the process, mostly in the area of parallel processing of computers. That is, multiple computers are configured to operate in unison. Some approaches have eliminated the Program Counter, which is the primary mechanism for sequential control of program steps. This can be cumbersome however, since programming of the operations now becomes more difficult.
A more productive approach would be to maintain the sequential control, but still eliminate the bottleneck caused be sequencing. Although the delay in fetching the instruction can be eliminated by prefetching the instruction, the von Neumann bottleneck of executing the actual operation is a key problem. Specifically, this process involves the instruction sequentially fetching the data from memory, bringing it out to the arithmetic processor where the operation is performed, and then storing the result back in memory.